For additional agenda details, please visit the Full Program Index.

 Location: State Ballroom | Raleigh Marriott City Center (Attached to the Raleigh Convention Center) 
7:00 AM - 7:00 PMRegistration OpenRegistration
9:15 AM - 9:45 AMRegistration & Coffee 
9:45 AM - 10:00 AMTutorial Introduction 
10:00 AM - 11:00 AMSilicon Carbide Substrate Technologies: Advantages, Challenges, and Solutions 
11:00 AM - 12:00 PMSiC Epitaxy Basics 
12:00 PM - 1:00 PMLunch 
1:00 PM - 2:00 PMSiC Power MOSFET Design from the Ground Up 
2:00 PM - 3:00 PMSiC Fabrication in a Silicon Fab 
3:00 PM - 3:30 PMBreak 
3:30 PM - 4:30 PMRuggedness of Commercial SiC Power Devices: An Urgent Issue 
4:30 PM - 5:15 PMHow SiC Power Devices Shape the Future of Power Electronics 
5:15 PM - 6:00 PMOptimizing SiC MOSFET Chip and Packaging Design to Match Specific Application Requirements 
7:00 PM - 9:00 PMRegistration OpenRegistration
7:00 PM - 9:00 PMWelcome ReceptionWelcome Reception
7:30 AM - 8:30 PMRegistration OpenRegistration
9:00 AM - 11:00 AMOpening PlenariesPlenaries
11:00 AM - 11:30 AMBreakBreaks
11:30 AM - 12:00 PMOptically Pumped Solid State Magnetometers for Planetary and Space Science: Inching closer to single-digit nanotesla sensitivities (invited)Quantum Sensing
11:40 AM - 12:00 PMHeavy ions radiation damage on silicon and silicon carbide detectorsSensors & Novel Applications
12:00 PM - 12:20 PMDephasing Times and Magnetic Field Sensitivity of the Silicon Vacancy in Isotopically-Purified 4H-SiCQuantum Sensing
12:00 PM - 12:20 PMInfluence of Gold Nanoparticle Distribution on the Performance of Self-powered Silicon Carbide Ultraviolet PhotodetectorSensors & Novel Applications
12:20 PM - 12:40 PMSiC CMOS Active Pixel Sensors with Embedded UV PhotodiodeSensors & Novel Applications
12:20 PM - 12:40 PMSimultaneous magnetic field and temperature sensing in SiC devicesQuantum Sensing
12:40 PM - 1:00 PMTowards identification of single photon emitters and electro-optical characterization of defects at the 4H-SiC/a-SiO2 interfaceQuantum Sensing
1:00 PM - 2:30 PMLunchMeals
2:30 PM - 3:00 PMReview for Resonac’s SiC Epiwafer Development (invited)Epitaxial Growth 1
2:30 PM - 3:00 PMThe Silicon Carbide FinFET – a milestone concept in power electronics (invited)Advanced Features in SiC MOSFETs
3:00 PM - 3:20 PMALD deposited SiO2 dielectric stack with engineered interface using in-situ Atomic Layer Annealing for high performance SiC MOSFETAdvanced Features in SiC MOSFETs
3:00 PM - 3:20 PMSilicon Carbide Epitaxial Growth Performance on 350um and 500um Thick 200mm SubstratesEpitaxial Growth 1
3:20 PM - 3:40 PMBasal Plane Dislocation Mitigation via Annealing and Growth InterruptsEpitaxial Growth 1
3:20 PM - 3:40 PMOptimizing 1.2 kV SiC Trench MOSFETs for Enhanced Performance and Manufacturing EfficiencyAdvanced Features in SiC MOSFETs
3:40 PM - 4:00 PMDefect density reduction in 4H-SiC (0001) epilayer via growth-interruption during buffer layer growthEpitaxial Growth 1
3:40 PM - 4:00 PMInvestigation of threshold voltage stability under high gate voltage stress in High-K SiC planar MOSFETsAdvanced Features in SiC MOSFETs
4:00 PM - 4:15 PMBreakBreaks
4:15 PM - 5:30 PMPoster Session 
5:30 PM - 6:00 PMBreakBreaks
6:00 PM - 8:30 PMIndustrial Session AIndustrial Session
6:00 PM - 8:30 PMIndustrial Session BIndustrial Session
7:30 AM - 6:30 PMRegistration OpenRegistration
8:40 AM - 9:10 AMImprovement of the yield during crystal growth of SiC by PVT by proper selection and design of hot zone isolation components (invited)Bulk Growth 1
8:40 AM - 9:10 AMMobility enhancement in SiC n- and p-channel MOSFETs (invited)MOSFET Channel Optimization
9:10 AM - 9:30 AMAnisotropy variation in MOS channel mobility among 4H-SiC nonpolar and semipolar facesMOSFET Channel Optimization
9:10 AM - 9:30 AMRapid Growth of Bulk SiC crystals via Physical Vapor Transport Method : Challenges to Improvement in the crystal qualities under rapid growthBulk Growth 1
9:30 AM - 9:50 AMCharacterization of interface trap and mobility degradation in SiC MOS devices using gated Hall measurementsMOSFET Channel Optimization
9:30 AM - 9:50 AMCrystal Quality Evaluation of 6-inch and 8-inch SiC Growth in Resistive Furnaces: Defect Mapping and CharacterizationBulk Growth 1
9:50 AM - 10:10 AMDynamic vs. Quasi-stationary C-V Characterization of MOS CapacitorsMOSFET Channel Optimization
9:50 AM - 10:10 AMStudy on effect of interfacial pore between seed and graphite holder for physical vapor transport growth of 4H-SiC crystalBulk Growth 1
10:10 AM - 10:30 AMImpact of Positive and Negative High Voltage Gate Stress on Channel Degradation in SiC MOSFETsMOSFET Channel Optimization
10:10 AM - 10:30 AMTaC-based protective coating systems adapted on graphite materials with different thermal expansion for the use in SiC PVT crystal growthBulk Growth 1
10:30 AM - 11:00 AMBreakBreaks
11:00 AM - 11:30 AMDoping-dependent fixed charges in SiC MOSFETs (invited)MOS Interfaces
11:00 AM - 11:30 AMSmartSiC™ 150 & 200mm engineered substrate: enabling SiC power devices with improved performances and reliability (invited)Engineered Substrates
11:30 AM - 11:50 AMImprovement over temperature of the substrate resistance contribution on a SiC diode by using SiC engineered substratesEngineered Substrates
11:30 AM - 11:50 AMInvestigation of Poly-Si gated, Al2O3-based high-k Dielectrics on 4H-SiCMOS Interfaces
11:50 AM - 12:10 PMHigh-temperature adhesive bonding of 4H-SiC substratesEngineered Substrates
11:50 AM - 12:10 PMInvestigation of Interface and Reliability of 3C- and 4H-SiC MOS Structures through Gate Dielectric Stacking and Post-Deposition AnnealingMOS Interfaces
12:10 PM - 12:30 PM4H-SiC Vertical Trench Power MOSFET Fabricated by Oxidation-Minimizing ProcessMOS Interfaces
12:10 PM - 12:30 PMStudy on epi performance of engineered 150 mm and 200 mm SiC substrates in a multi-wafer batch reactorEngineered Substrates
12:30 PM - 6:30 PMExhibit Hall OpenExhibit Hall
12:30 PM - 2:00 PMLunch & Exhibits 
2:00 PM - 2:20 PMAtomistic defect modeling in SiC for crystal growth optimizationCharacterization I
2:00 PM - 2:20 PMDesign and Simulation of Greatly Improved Future Generation 4H-SiC JFET-R Integrated Circuits for Prolonged 500 °C OperationHigh Temperature Operation & Radiation Effects
2:20 PM - 2:40 PMAnalysis of Trap Centers Generated by Hydrogen Implantation in 4H-SiC Bonded SubstratesCharacterization I
2:20 PM - 2:40 PMDevice Performance and Reliability of SiC CMOS up to 400 ̊CHigh Temperature Operation & Radiation Effects
2:40 PM - 3:00 PMAnalysis of Latent Gate Oxide Damage in Heavy-Ion Irradiated High-Voltage SiC Power MOSFETsHigh Temperature Operation & Radiation Effects
2:40 PM - 3:00 PMStudy on conversion of survived BPDs in epitaxial layer to TEDsCharacterization I
3:00 PM - 3:20 PMImprovement of Single Event Leakage Current Tolerance in 4H-SiC Trench MOSFETHigh Temperature Operation & Radiation Effects
3:00 PM - 3:20 PMRelationship between contrast formation in the mirror electron images and the distribution of crystal defects in polishing damage introduced on the surface of 4H-SiC wafersCharacterization I
3:20 PM - 3:40 PMRole of Point Defects in Suppressing Stacking Fault Expansion through Helium and Proton Implantation in SiC Epitaxial LayerCharacterization I
3:20 PM - 3:40 PMSiC in space: potential application surveyHigh Temperature Operation & Radiation Effects
3:40 PM - 4:00 PMDemonstration of Structural Effects on SEB Tolerance in Trench Gate SiC-MOSFETs under Heavy-Ion IrradiationHigh Temperature Operation & Radiation Effects
3:40 PM - 4:00 PMPolarization superimposed phase contrast microscope inspection of dislocations in SiC epitaxial layerCharacterization I
4:00 PM - 4:30 PMBreakBreaks
4:30 PM - 6:30 PMPoster Session 
7:30 AM - 6:30 PMRegistration OpenRegistration
8:30 AM - 6:30 PMExhibit Hall OpenExhibit Hall
8:40 AM - 9:10 AMDeep Implanted SiC Super-Junction Technology (invited)Superjunction & High Voltage Devices
8:40 AM - 9:10 AMUnveiling border trap energetics in a SiO2-SiC system using capacitance based optical excitation spectroscopy (invited)Characterization II
9:10 AM - 9:30 AMCarbon-related interface defects in p-channel 4H-SiC MOSFETsCharacterization II
9:10 AM - 9:30 AMCost-Effective Design and Optimization of a 3300-V Semi Superjunction 4H-SiC MOSFET DeviceSuperjunction & High Voltage Devices
9:30 AM - 9:50 AMEconomic Feasibility Analysis of Vertical High-Voltage 4H-SiC Superjunction MOSFETs Compared to Conventional CounterpartsSuperjunction & High Voltage Devices
9:30 AM - 9:50 AMSignal inversion in charge pumping electrically-detected magnetic resonance of 4H-SiC MOSFETsCharacterization II
9:50 AM - 10:10 AMImpact of transition from full- to semi-superjunction structure on the performance limit of 4H-SiC devicesSuperjunction & High Voltage Devices
9:50 AM - 10:10 AMPhotoelastic measurement of residual stress in 4H-SiC substrates for evaluation of crystal growth and wafering processCharacterization II
10:10 AM - 10:30 AMElectrical detection of Magnetic Resonance on a Chip (EDMRoC): A low-cost and sensitive characterization tool for defects in SiC MOSFETsCharacterization II
10:10 AM - 10:30 AMHigh Current Pulse Power Operation of 12 kV SiC ThyristorsSuperjunction & High Voltage Devices
10:30 AM - 11:00 AMBreakBreaks
11:00 AM - 11:30 AMThreshold voltage drift mechanism in SiC MOSFETs by photon-assisted electron injection under bipolar AC gate stress (invited)Stress & Threshold Voltage Instabilities
11:10 AM - 11:30 AMAn approach on the void-free refill of 4H-SiC trench by CVDEpitaxial Growth 2
11:30 AM - 11:50 AMControlling 4H-SiC Trench Refill Epitaxy for Superjunction Power Devices with Supersaturated Chlorinated ChemistryEpitaxial Growth 2
11:30 AM - 11:50 AMInsight into the mobility-limiting factors of SiC MOSFETs: the impact of gate bias stressStress & Threshold Voltage Instabilities
11:50 AM - 12:10 PMLateral epitaxial CVD growth of 4H-SiCEpitaxial Growth 2
11:50 AM - 12:10 PMUltra-fast bias temperature instability and charge pumping studies of SiC trench MOSFETs with varying trench orientationsStress & Threshold Voltage Instabilities
12:10 PM - 12:30 PMAchieving Low Dit (~5×1010eV-1cm-2), Competitive JG (~ 5×10-10 A cm-2) Performance and Enhanced Post-Stress Flatband Voltage Stability Using Deposited OxideStress & Threshold Voltage Instabilities
12:10 PM - 12:30 PMNearly Defect-Free Epitaxy on 150 mm C-Face SiC SubstratesEpitaxial Growth 2
12:30 PM - 2:00 PMLunch & Exhibits 
2:00 PM - 2:20 PMFormation of Pt ohmic contacts on p-type SiC with low contact resistivity by 600°C-annealing processContacts
2:10 PM - 2:40 PMX-ray Topography Characterization of SiC Crystals aided by Ray Tracing Simulations (invited)Extended Defects I
2:20 PM - 2:40 PMA simplified method for extracting contact resistivity using the circular transmission line modelContacts
2:40 PM - 3:00 PMEvolution of the electrical and microstructural properties of Mo/4H-SiC contact with the annealing temperatureContacts
2:40 PM - 3:00 PMUsing Convolutional Neural Network to Map Defects in SiCExtended Defects I
3:00 PM - 3:20 PMAdvantages of backside metal contact resistance on 4H-SiC bonded substrates for power devicesContacts
3:00 PM - 3:20 PMPunching of Prismatic Dislocation Loops from Inclusions in 4H-SiC WafersExtended Defects I
3:20 PM - 3:40 PMAbnormal carrot defect and its buried prismatic stacking fault structure in 4H-SiC epitaxial layerExtended Defects I
3:20 PM - 3:40 PMIndium-Tin-Oxide (ITO) Interlayer-assisted Ohmic Contacts on N-type 4H-SiC with Low Specific Contact ResistanceContacts
3:40 PM - 4:00 PMFormation of Ti-based ohmic contacts on n-type SiC with ρC= 6*10^{-8} Ωcm^2Contacts
3:40 PM - 4:00 PMNew insights into the occurrence of prismatic slip during PVT growth of SiC crystalsExtended Defects I
4:00 PM - 4:30 PMBreakBreaks
4:30 PM - 6:30 PMPoster Session 
7:30 AM - 8:00 PMRegistration OpenRegistration
8:30 AM - 6:30 PMExhibit Hall OpenExhibit Hall
8:40 AM - 9:10 AMFormation mechanism of basal plane dislocations in 150 mm-diameter SiC wafers with thick epitaxial layers (invited)Extended Defects II (Stacking Faults)
8:40 AM - 9:10 AMSuppression of Short-Channel Effects by Self-Aligned Process for SiC UMOSFETs with Channel Length of under 0.3 μm (invited)Novel Device Architectures
9:10 AM - 9:30 AMInvestigation of Advanced Hexagonal Layouts for 650 V SiC MOSFETsNovel Device Architectures
9:10 AM - 9:30 AMInvestigation of BPD Faulting in Engineered vs Monocrystalline SiC Substrates Under Ultra-High Carrier Injection for Pulsed Power ApplicationExtended Defects II (Stacking Faults)
9:30 AM - 9:50 AMA Novel 'Ladder' Design for Improved Channel Density for 1.2kV 4H-SiC MOSFETsNovel Device Architectures
9:30 AM - 9:50 AMFormation Mechanism and Complex Faulting Behavior of a BPD Loop in 180 µm Thick 4H-SiC Epitaxial layerExtended Defects II (Stacking Faults)
9:50 AM - 10:10 AMDynamics of stacking fault expansion in H+ implanted SiC-MOSFETs investigated by photoluminescence spectroscopyExtended Defects II (Stacking Faults)
9:50 AM - 10:10 AMSiC MOSFETs C-V capacitance curves with negative biased DrainNovel Device Architectures
10:10 AM - 10:30 AMDemonstration of Suppressing 1SSF Expansion Using Energy Filtered Ion ImplantationExtended Defects II (Stacking Faults)
10:10 AM - 10:30 AMOn the Characterization of 4H-SiC PiN and JFETs for their USE in High-Voltage Bidirectional Power DevicesNovel Device Architectures
10:30 AM - 11:00 AMBreakBreaks
11:00 AM - 11:30 AMHeavy-ion irradiation effects in 4H-SiC unipolar devices (invited)Radiation Effects & Superjunction
11:10 AM - 11:30 AMControl over the density of single photon emitters at SiO_2/SiC interfaces: CO_2 vs. Ar annealingQuantum Centers & Characterization
11:30 AM - 11:50 AMExploring intrinsic high-frequency limitations of electronic devices: The end of the road of Schottky rectificationSensors & Novel Applications
11:30 AM - 11:50 AMImpact of electron irradiation on SiC power MOSFET performanceRadiation Effects & Superjunction
11:50 AM - 12:10 PMEffects of Proton Irradiation Before Device Fabrication on the Switching Characteristics of 3.3kV SiC MOSFETsRadiation Effects & Superjunction
11:50 AM - 12:10 PMEvolution of photoluminescence and optically detected magnetic resonance spectra of divacancy defects in 4H-SiC from cryogenic to room temperaturesQuantum Centers & Characterization
12:10 PM - 12:30 PMAnnealing 4H-SiC Trenches for Superjunction TechnologyRadiation Effects & Superjunction
12:10 PM - 12:30 PMInvestigation of oxygen-related defects in 4H-SiC from ab initio calculationsQuantum Centers & Characterization
12:30 PM - 2:00 PMLunch & Exhibits 
2:00 PM - 2:20 PMTemperature Dependence of 1200V-10A SiC Power Diodes: Impact of Design and Substrate on Electrical PerformanceDevice Characterization & Defect Impacts
2:10 PM - 2:40 PM8-inch thick SiC crystals grown by solution growth method combined with digital twin (invited)Bulk Growth 2
2:20 PM - 2:40 PMExploring the Influence of Implant Profile and Device Design on Basal Plane Dislocation Generation in 1.2kV 4H-SiC Power MOSFETsDevice Characterization & Defect Impacts
2:40 PM - 3:00 PMNumerical Simulation Study on Different Scales to Suppress Solvent Inclusion Defects in SiC Solution Crystal GrowthBulk Growth 2
2:40 PM - 3:00 PMThree level stress pulses to investigate gate switching instabilityDevice Characterization & Defect Impacts
3:00 PM - 3:20 PMDevelopment of a 200 mm-Diameter 4H-SiC Crystal Using the HTCVD Method Enhanced by Process InformaticsBulk Growth 2
3:00 PM - 3:20 PMInvestigation on effect of electrical characteristics of proton implanted 4H-SiC MOSFETDevice Characterization & Defect Impacts
3:20 PM - 3:40 PMA novel method to grow 4H-SiC single crystals with low BPD densities on multiple substrates: Grown crystals’ properties and their controlling factorsBulk Growth 2
3:20 PM - 3:40 PMMatching physical and electrical measurements (OBIC) to simulation (FEM) on high voltage bipolar diodesDevice Characterization & Defect Impacts
3:40 PM - 4:00 PMML-based Surrogate Model for Temperature Prediction and Efficient Parameter Calibration of PVT SimulationsBulk Growth 2
3:40 PM - 4:00 PMUsing in-situ nanoprobing in the scanning electron microscope to visualize the local potential on a biased SiC p-n junctionDevice Characterization & Defect Impacts
4:00 PM - 4:30 PMBreakBreaks
4:30 PM - 6:30 PMPoster Session 
7:30 PM - 10:00 PMGala Dinner (Ticket needed to enter)Gala Dinner
7:30 AM - 10:00 AMRegistration OpenRegistration
8:30 AM - 8:50 AMFabrication of the planer SiC gate-all-around JFET with channel dose modulationIon Implantation
8:30 AM - 8:50 AMSpectral Investigation of Various Stacking Faults After Epitaxial Growth of 180m Thick Layer on 4H-SiC substratesEpitaxial Growth 3
8:50 AM - 9:10 AMEpitaxial growth of 280 μm thick 4H-SiC on 4°-off substrates for ultra-high-power devicesEpitaxial Growth 3
8:50 AM - 9:10 AMSuppression of stacking-fault expansion in 4H-SiC diodes by helium implantationIon Implantation
9:10 AM - 9:30 AMFormation of alternating epilayers of 4H-SiC and 3C-SiC by simultaneous lateral epitaxyEpitaxial Growth 3
9:10 AM - 9:30 AMSimulation of High-energy Channeling Implantation in 4H-SiCIon Implantation
9:30 AM - 9:50 AMInvestigation of Dry Transfer of Epitaxial Graphene from SiC(0001)Epitaxial Growth 3
9:30 AM - 9:50 AMThermal-oxidation and Ion-implantation-induced Strain in 4H-SiCIon Implantation
9:50 AM - 10:10 AMIsolation Structure for Monolithic Integration of Planar CMOS and 1.7 kV Vertical Power MOSFET on 4H-SiC by High Energy Ion ImplantationIon Implantation
9:50 AM - 10:10 AMUnleashing the Potential of Low Dimensional Silicon CarbideEpitaxial Growth 3
10:10 AM - 10:30 AMEffect of counter-doping on threshold voltage and mobility in SiC p-channel MOSFETsIon Implantation
10:10 AM - 10:30 AMNew insights in Orientation and Growth of 150 mm GaN on SiC for HEMTEpitaxial Growth 3
10:30 AM - 11:00 AMBreakBreaks
11:00 AM - 11:30 AMLifetime modeling of MOS based SiC vertical power devices under high voltage blocking stress (invited)Reliability & Robustness
11:10 AM - 11:30 AMAnalysis of Silicon Vacancy Configurations and their IdentificationPoint Defects
11:30 AM - 11:50 AMChallenges of Transient Virtual Junction Temperature Measurement of SiC MOSFETs by VSD(T)-Method for Power Cycling – A Study on Impact FactorsReliability & Robustness
11:30 AM - 11:50 AMCharacterization of the charge state of the silicon vacancy in 4H-SiC using low-energy muon spin spectroscopyPoint Defects
11:50 AM - 12:10 PMBipolar degradation driven by junction-temperature controlled Power Cycling Milliseconds (PCmsec) in Silicon Carbide Power DevicesReliability & Robustness
11:50 AM - 12:10 PMChanneling proton implantation for localized defect control in 4H-SiC: A combined SIMS/DLTS depth profiling studyPoint Defects
12:10 PM - 12:30 PMElectrically Detected Magnetic Resonance and Near-Zero Field Magnetoresistance Measurements of Deep Level Defects in GaN Schottky DiodesPoint Defects
12:10 PM - 12:30 PMInvestigation of overcurrent turn-off robustness of 1200 V SiC MOSFETsReliability & Robustness
12:30 PM - 1:30 PMLunchMeals
1:30 PM - 2:00 PMMonte Carlo analyses on impact ionization coefficients in 4H-SiC (invited)Intrinsic Properties
1:40 PM - 2:00 PMPhysically Based Mobility Model for SiC MOSFETs in TCADMOSFET Modeling
2:00 PM - 2:20 PMLow-field and high-field anisotropic electron transport in 4H-SiCIntrinsic Properties
2:00 PM - 2:20 PMTCAD Modelling of Anisotropic Channel Mobility in 4H-SiC MOSFETsMOSFET Modeling
2:20 PM - 2:40 PMApplication of photoexcited muon spin spectroscopy to study excess charge carrier lifetimes in 4H-SiC epilayersIntrinsic Properties
2:20 PM - 2:40 PMInfluence of Threshold Voltage Mismatch on Switching Behavior of Parallel SiC Power MOSFETsMOSFET Modeling
2:40 PM - 3:00 PMA Physics-Based SPICE Model for a SiC Vertical Power MOSFETMOSFET Modeling
2:40 PM - 3:00 PMFirst principles study of acceptor impurities in 4H-SiC bulk and interfacesIntrinsic Properties
3:00 PM - 3:30 PMBreakBreaks
3:30 PM - 4:30 PMClosing Plenary & ICSCRM 2025 PreviewPlenaries