We demonstrate the potential of the measurement of the photoelastic effect as a non-destructive and fast full-wafer method for quality control of 4H-SiC wafers and to assess the crystal growth process. For that purpose, we performed full wafer measurements of the stress-induced birefringence of 150mm diameter 4° off-axis 4H-SiC substrates. The results show that the measurements can be used to analyze qualitative differences between different substrates, but also for a very sensitive analysis of the residual stress in the wafer itself with a currently achieved detection limit below 1 MPa. We further correlate these measurements to the density and propagation direction of basal plane dislocations (BPDs) measured by x-ray topography (XRT), which gives additional insights into stress relief by dislocation formation. From the analysis of wafers from different manufacturers, we found that most of them exhibit a radial stress distribution as shown for wafer 1 and 2 in Fig.1. The tangential stress to the edge ranges between 5 and 15 MPa, whereas the stress in the center is below 2 MPa. Such a residual stress distribution is expected from a radially symmetric temperature profile during crystal growth. Guo et al. have observed that such thermal stress leads to prismatic slip resulting in a characteristic BPD orientation distribution[1]. We have analyzed the BPD orientation and can confirm this characteristic in our wafers. It is also expected that a higher thermal stress during growth leads to higher density of dislocations. In this study we observe a strong correlation between residual stress and BPD density giving a strong indication that we measure residual thermal stress in these wafers. Previously we have shown that SiC wafers exist which show a totally different BPD distribution[2]. We performed stress measurements on such wafers as well. Wafer 3 in Fig. 1 represents an example of such a specimen. The radial stress distribution as expected from a radially symmetric growth furnace cannot be observed here. In addition, the stress levels are very low. Nevertheless, this wafer exhibits a significant BPD density. This indicates differences in the growth process or a post-treatment, which results in a reduction of the stress by dislocation formation or multiplication. Besides observing the thermal stress field on a wafer scale, also local changes in the magnitude and direction of residual stress can be studied. We also address these effects and how they are related to different crystallographic defects in this study. Apart from thermal stress, also mechanically induced stress can be an important topic in the wafering process and might affect the (hot) bow behavior of the wafer during epitaxy and further device processing. Our measurement show increased stress at the wafer flat for most wafers which likely has been introduced during the preparation of the flat or the laser scribe. This stress introduced at cold process steps does not result in dislocations as verified by XRT measurements and is thus invisible to methods relying on dislocation detection. [1] J. Guo et al., J. Electron. Mater. 46, 2040-2044 (2017). [2] P. Wimmer et al., poster presentation at ICSCRM 2023, Sorrento. [3] M. Fukuzawa, N. Kudo, J. Electron. Mater. 52, 5172-5177 (2023). [4] K. Kamitani et al., J. Appl. Phys. 82, 3152-3154 (1997).