Name
Formation of alternating epilayers of 4H-SiC and 3C-SiC by simultaneous lateral epitaxy
Description

Semiconductor devices based on polytype heterojunctions are an attractive application of SiC. To obtain a single-domain 3C-SiC epilayer on 4H-SiC, we developed the simultaneous lateral epitaxy (SLE) method. The heterojunction obtained by SLE consists of a coherent interface between 4H-SiC(0001) Si-face and 3C-SiC(-1-1-1) C-face, which is known to generate a two-dimensional hole gas (2DHG). To generate a two-dimensional electron gas (2DEG), on the other hand, the interface must consist of the 4H-SiC(000-1) C-face and 3C-SiC(111) Si-face. To obtain either 2DEG or 2DHG at will, the SLE method has been extended to form epitaxial layers of alternating stacks of 4H-SiC and 3C-SiC. To form single-domain 3C-SiC on 4H-SiC, 3C-SiC mononuclear (ηc) must be generated spontaneously on the basal plane of 4H-SiC, which is a necessary condition for eliminating the double-positioning boundary (DPB). On the other hand, the generation of 4H-SiC nuclear on the surface of 3C-SiC layer is practically difficult even if the surface is atomically flat. This is because, the stacking sequence of 4H-SiC is not uniquely determined. In this study, the 3C-SiC surface is arranged so that the stacking sequence originally contained in the 4H-SiC substrate propagates laterally on it. To achieve this, ηc must be placed at specific locations. It should be noted that each ηc is shifted to a relative [0001] direction. Then the 3C-SiC layer originating from ηc and surrounding the 4H-SiC layer expand in the [11-20] direction by SLE. Finally, a 4H-SiC layer can be inserted between each 3C-SiC layer. Even if each ηc generated is in a twinning relationship, they are isolated by the intermediate 4H-SiC layer and thus are spared from DPB generation. 4H-SiC with a surface tilted 4 degrees in the [11-20] direction relative to the (0001) plane is used as a substrate for SLE. Before the epitaxial growth, grooves of 8 μm-width and 0.8 μm-depth are formed on the substrate surface by photolithography and dry etching techniques. All grooves are deflected away from the [1-100] direction forming vertices (τ) in the [11-20] direction. Then, the single-nucleation of 3C-SiC is promoted near τ, which is located relatively upstream in the area in between adjacent grooves. The spacing of adjacent τ in the [11-100] direction (P), the width of τ with respect to the [-1-120] direction (Z), and the spacing of adjacent grooves (W) are varied. After the groove formation, a specific cubic close-packed structure is exposed on the topmost surface of the substrate by Step-Alignment(R) treatment, and then a 5.5 μm-thick SiC layer is epitaxially grown. A single 3C-SiC layer is epitaxially grown at Area-1 (Z=20 μm, P=40 μm, W=150 μm) on 4H-SiC layer, while multiple 3C-SiC layers extend in the [11-20] direction at Area-2 (Z=20 μm, P=200 μm, W=20 μm). A linear 3C-SiC surface parallel to the [1-100] direction is observed among 4H-SiC surface at Area-3 (Z=10 μm, P=40 μm, W=150 μm). Cross-sectional TEM image at Area-3 clearly shows that all the hetero-interfaces are coherent and parallel to the basal plane. As described above, it is possible to obtain 4H-SiC(0001) Si-face / 3C-SiC(-1-1-1) C-face and 4H-SiC(000-1) C-face / 3C-SiC(111) Si-face interfaces simultaneously. This makes it possible to place 2DEG and 2DHG regions at the desired locations, giving more flexibility in device design.

Speakers
Hiroyuki Nagasawa - CUISC Inc.
Date
Friday, October 4, 2024
Time
9:10 AM - 9:30 AM
Location Name
Room 305
Track
Epitaxial Growth 3