Silicon Carbide (SiC) is a wide bandgap semiconductor that has significant promise for power devices. Its characteristics, including high breakdown field, and high thermal conductivity, which enables SiC devices to operate in severe conditions such as high temperature, voltage, and frequency [1]. Devices operating up to 3.3kV are commercially available, and are mainly used for automotive and traction control applications. However, higher voltage rated (>6.5kV) SiC devices are needed for hybrid systems, shipboard power, grid systems, and defense applications. These devices are fabricated on SiC wafers with thick epi-layers to achieve required breakdown voltages [2]. However, as the epi-layer becomes thicker, density of defects formed during growth increases [3], which significantly degrades device performance. Recently, Mahadik et. al. have reported a complex stacking fault that originated in the substrate then propagated into 180 μm thick epi-layer, and generates several Shockley-type stacking faults (SSFs) upon carrier injection by UV excitation [4] via the recombination enhanced dislocation glide mechanism [5,6]. Another observed defect in epi-layers is the interfacial dislocation (ID) with associated half loop arrays (HLAs) [7]. Here the gliding motion of originally screw oriented basal plane dislocations (BPD) under mismatch stresses, induces bending at the growth front that makes them prone to be converted to threading edge dislocations (TEDs). As the gliding velocity of BPD exceeds the growth rate of the epi-layer, sections of the mobile BPD manage to protrude through the surface, forming HLAs each consisting of two TEDs and a BPD segment. In this paper, 4H-SiC with 180 μm epilayer was characterized by ultraviolet photoluminescence (UVPL) imaging and High-resolution X-ray topography (XRT). Fig. 1(a) shows XRT image before UV exposure, where screw BPD originated from the substrate replicated in epilayer forming BPD loop and ID. However, no HLA is observed associated with the ID. The formation mechanism of such defect is that the screw BPD segment first get replicated into epilayer (Fig. 1(b)) then glide under the misfit stress (Fig. 1(c)). Due to the change of the line direction, the BPD segment at the growth front will not be screw type so that partials can constrict enabling conversion to TED acting as pinning point (Fig. 1(d)). In this case, differing from the formation of HLAs, the relative gliding speed of the BPD is lower than the growth rate of the epilayer due to lower stress, so it propagates as a loop in the epi-layer and forms ID at the epi/sub interface (Fig. 1(e) and 1(f)). Fig. 1(g) shows UVPL image of the BPD loop in epi-layer, where several stacking faults formed during growth are highlighted by the yellow arrows. After the UV stress, not only initial SSF is expanded, as indicated by the yellow circle in Fig. 1(h), but also 15 new SSFs are formed from a complex interaction of expanding BPD loop with preexisting threading mixed dislocations. This will have more detrimental effect on devices. Details of the formation and the complex expansion mechanisms will be presented. [1] A.A. Lebedev and V.E. Chelnokov, Semiconductors 33, 999–1001 (1999). [2] P. Luo and S. N. E. Madathil, IEEE Transactions on Electron Devices, 67 5621-5627 (2020) [3] H. Tsuchida, et. al., Mater. Sci. Semi. Process. 78, 2 (2018) [4] N. A. Mahadik, et. al., Scripta Materialia 235, 115598 (2023) [5] J.P. Bergman, H. Lendenmann, et. al., Mater. Sci. Forum 353–356, 299–302 (2001) [6] A. Galeckas, J. Linnros, P. Pirouz, Appl. Phys. Lett. 81, 883–885 (2002) [7] N. Zhang, Y. Chen, Y. Zhang, M. Dudley and R. E. Stahlbush, Appl. Phys. Lett. 94, 122108 (2009)