Abstract: This study investigates the role of ultra-thin conductive Indium-Tin-Oxide (ITO) as an interlayer at the Metal-SiC (MS) junction to lower the overall specific contact resistance (SCR) for source drain metallization applications on n-type 4H-SiC substrates. In this work, we demonstrate an improvement in SCR by 1 order of magnitude from ~10-6 Ω∙cm2 to 10-7 Ω∙cm2 through the integration of an ultra-thin ITO interlayer. Barrier height (ΦB) lowering by ~ 0.1 eV was observed at the MS interface as deposited which could have assisted in the reduction of the SCR. Titanium-based Ohmic contacts were subsequently formed at 950 °C. Various thicknesses of ITO were examined to assess their influence on the formation of ohmic contacts to n-type SiC. An SCR (ρc) of 6.9 × 10-7 Ω∙cm2 was achieved through integration of an ultra-thin conductive ITO interlayer at the MS interface. Introduction: The specific on-resistance (RON) in SiC devices consists of various components: n+ contact, channel, JFET, drift, and substrate resistances. In 4H-SiC power JBSFETs, the n+ contact resistance accounts for roughly ~50% of the total resistance, given a contact width of 1 μm [1]. Therefore, minimizing the SCR becomes crucial for reducing overall RON. The SCR in 7 nm CMOS node is much lower in comparison to SiC metal contacts due to the ease of silicide formation [2]. Our objective was to minimize carbon at the MS interface to achieve a lower SCR. In this study, a conductive metal oxide (ITO) was employed to facilitate the reduction of carbon during post metal deposition annealing (PMDA). Additionally, conductive ITO enables efficient charge transport across interfaces, acting as an effective passivation layer that can reduce surface states and enhance device performance [3]. This paper further investigates the role of ITO as an interlayer at the MS interface in SCR reduction. Results and Discussion: 4° off-cut N-type 4H-SiC substrates (0001), with a doping concentration of 5× 1018 cm-3, were cleaned by standard SPM and BOE (7:1) chemistries as per previous work prior to fabrication. Schottky Barrier Diodes (SBDs) were fabricated, as shown in Fig. 1 (a), with different ITO interlayer thicknesses followed by Ti/Al Schottky contacts. Subsequently, Circular Transmission Line Method (CTLM) structures for contact resistance measurement were also fabricated using a Ti-based metal stack (Ti/TiN) as shown in Fig. 2 (a-c). In Fig. 1 (b-c), I-V measurements on the SBD samples indicate a reduction in ΦB by ~ 0.1 eV with the incorporation of an ITO interlayer as deposited. Following the PMDA at 950 °C, only the ultra-thin ITO sample exhibited ohmic behaviour, as depicted in Fig. 1 (d). In thicker samples, the ITO could have hindered the intermetallic diffusion of the Ti-based metal stack into the SiC, resulting in rectifying behaviour. The deposited thickness of ITO had a notable impact on the ohmic behaviour of the sample. Passivation of the interface and surface states with ITO could have also lowered ΦB at the MS interface [3]. Results from Ultraviolet Photoelectric Spectroscopy (UPS) analysis indicated a slight decrease in the work function of the silicide, as shown in Fig. 2 (d). Electrical measurements on the CTLM structures with varying gap spacings of 20-100 μm revealed a ρc of ~ 10-7 Ω∙cm2 with the ITO interlayer, leading to a significant reduction by 1 order of magnitude as compared to samples without ITO [Fig. 3 (a-b)]. This reported value indicates a relatively low SCR as benchmarked in Fig. 3 (c) [4-7]. Intermetallic diffusion and silicide formation at the MS interface after 950 °C PMDA was investigated with Transmission Electron Microscopy (TEM-EDX) colour mapping as illustrated in Fig. 4 (a-h). We observed the clear formation of TiSi2 phase in the sample which forms the ohmic contact. An absence and clear out diffusion of carbon atoms from the silicide layer was also observed. This out diffusion could have been further promoted by positively charged Indium atoms from the ITO interlayer [8]. These carbon vacancies can serve as electron donors, potentially contributing to the improvement in ohmic contact formation, thereby achieving a lower SCR value. Conclusion: In this work, we have demonstrated that the incorporation of ultra-thin conductive ITO at the MS interface as an interlayer material had reduced the SCR by almost 1 order of magnitude to 6.9 × 10-7 Ω∙cm2 on n-type SiC. This was achieved through the reduction of ΦB and promotion of carbon out diffusion by the ITO layer. Acknowledgement: This work was supported by A*STAR (Agency for Science, Technology and Research Singapore), under Grant No. A20H9A0242.