SiC has been studied intensively in the past decades due to its excellent properties such as high electric breakdown field, high thermal conductivity, and large saturation electron drift velocity. These properties lead to much better device performance than silicon for high-voltage power applications and high-temperature operations [1,2]. Up to now, all SiC power devices rely on single-crystal 4H-SiC substrates. Progress has been made by SiC suppliers to lower the crystal defectivity, but the dopant concentration is physically limited to a certain level leading, for single-crystal 4H-SiC substrates, to an electrical resistivity typically of 20mOhm.cm. Among the different doping elements, nitrogen is the main donor impurity in all the polytypes of SiC [3]. One challenge to improve SiC power device performance is to obtain a higher doped substrate which can give lower electrical resistivity. Starting from basic research studies [4], recently has been shown the ability of SiC engineered substrate (SmartSiC™) to be highly doped (with a polySiC handle substrate doping in the order of 1020 at/cm2) [5], which suggests the use of this material as a SiC engineered substrate for higher-performing SiC power device by lowering the electrical resistivity. In this paper, a study on the resistivity and mobility properties of SiC engineered substrates enabling an increase of the current density at the device level is shown. Compared to standard single-crystal SiC substrate, the SiC engineered substrate has almost one order of magnitude lower electrical resistivity. We have fabricated 650V JBS SiC diodes using both single-crystal 4H-SiC (STD) and SiC engineered substrates. Forward electrical characterization has been performed to compare the substrate electrical resistance of the two substrates. Forward characterizations were performed (Figs. 1a and b). The experimental results were fitted by simulations considering a value of resistivity 6 times lower for the case of the p-SiC (inserts Figs. 1a and b). To design the optimum device structures using SiC engineered substrate, it is necessary to know the electric characteristics in a wide temperature range of temperatures. Forward electrical characterization has been performed in the range 25-175°C. In Fig. 2 the delta resistivity between SiC diode with STD and SiC engineered substrate is shown. PolySiC material resistance increases more slowly than the STD one, with temperature. Indeed from 25° up to 175°C delta resistance increases by 3 mΩ.mm2. To better understand the nature of this temperature behavior we have simulated the experimental results with the electron mobility Arora Model [5], determining the parameters required to carry out the device simulations to be used for the SiC engineered substrate) (for STD substrate the one from [5] as been considered). The results of fitting optimization of the experimental results in Fig. 2, is shown. Using the Arora model for STD and the one modified for the SiC engineered substrate we have calculated the mobility for both materials. Fig. 3 shows that STD substrate has higher mobility than SiC engineered substrate one of 17 times at 25°C. By increasing the temperature, the ratio between the STD and SiC engineered substrate mobility increases up to 40 times. To explain the lower resistance of SiC engineered substrate (Fig. 2) with its lower mobility (Fig. 3) we need to take into account the doping of SiC engineered substrate, which is higher by two orders of magnitude compared to the one of STD substrate. Those results show that the electrical conductivity of SiC substrates depends on different factors such as mobility and doping level. The possibility of high-doped SiC, such as in SiC engineered substrate, is of high interest not only to better understand the electrical conductivity mechanisms in polySiC material but also to open the way for further optimization of the power device using SiC engineered substrate. [1] K. Shenai, R. S. Scott, B. J. Baliga, IEEE Trans. Electron Devices 36, 1811 (1989). [2] T. P. Chow, R. Tyagi, IEEE Trans. Electron Devices 41, 1481 (1994). [3] H. Woodbury, G. W. Ludwig, Phys. Rev. 124, 1083 (1961). [4] J.Y. W. Seto, J. Appl. Phys., 48, 12 (1975). [5] E. Guiot, G. Picun, F. Allibert, W. Schwarzenbach, A. Drouin, JM. Bethoux, S. Rouchier, J.Leib, T. Becker, T. Erlbacher, PCIM Europe (2022). [6] Sudarshan Khrishnamoothy, Simulation of Wide Band-Gap Devices SiC and GaN, Mountain View, California: Synopsys, Inc. (2008).