Improvement of the yield during crystal growth of SiC by PVT by proper selection and design of hot zone isolation components (invited)
Bulk Growth 1
8:40 AM - 9:10 AM
Mobility enhancement in SiC n- and p-channel MOSFETs (invited)
MOSFET Channel Optimization
9:10 AM - 9:30 AM
Anisotropy variation in MOS channel mobility among 4H-SiC nonpolar and semipolar faces
MOSFET Channel Optimization
9:10 AM - 9:30 AM
Rapid Growth of Bulk SiC crystals via Physical Vapor Transport Method : Challenges to Improvement in the crystal qualities under rapid growth
Bulk Growth 1
9:30 AM - 9:50 AM
Characterization of interface trap and mobility degradation in SiC MOS devices using gated Hall measurements
MOSFET Channel Optimization
9:30 AM - 9:50 AM
Crystal Quality Evaluation of 6-inch and 8-inch SiC Growth in Resistive Furnaces: Defect Mapping and Characterization
Bulk Growth 1
9:50 AM - 10:10 AM
Dynamic vs. Quasi-stationary C-V Characterization of MOS Capacitors
MOSFET Channel Optimization
9:50 AM - 10:10 AM
Study on effect of interfacial pore between seed and graphite holder for physical vapor transport growth of 4H-SiC crystal
Bulk Growth 1
10:10 AM - 10:30 AM
Impact of Positive and Negative High Voltage Gate Stress on Channel Degradation in SiC MOSFETs
MOSFET Channel Optimization
10:10 AM - 10:30 AM
TaC-based protective coating systems adapted on graphite materials with different thermal expansion for the use in SiC PVT crystal growth
Bulk Growth 1
10:30 AM - 11:00 AM
Break
Breaks
11:00 AM - 11:30 AM
Doping-dependent fixed charges in SiC MOSFETs (invited)
MOS Interfaces
11:00 AM - 11:30 AM
SmartSiC™ 150 & 200mm engineered substrate: enabling SiC power devices with improved performances and reliability (invited)
Engineered Substrates
11:30 AM - 11:50 AM
Improvement over temperature of the substrate resistance contribution on a SiC diode by using SiC engineered substrates
Engineered Substrates
11:30 AM - 11:50 AM
Investigation of Poly-Si gated, Al2O3-based high-k Dielectrics on 4H-SiC
MOS Interfaces
11:50 AM - 12:10 PM
High-temperature adhesive bonding of 4H-SiC substrates
Engineered Substrates
11:50 AM - 12:10 PM
Investigation of Interface and Reliability of 3C- and 4H-SiC MOS Structures through Gate Dielectric Stacking and Post-Deposition Annealing
MOS Interfaces
12:10 PM - 12:30 PM
4H-SiC Vertical Trench Power MOSFET Fabricated by Oxidation-Minimizing Process
MOS Interfaces
12:10 PM - 12:30 PM
Study on epi performance of engineered 150 mm and 200 mm SiC substrates in a multi-wafer batch reactor
Engineered Substrates
12:30 PM - 6:30 PM
Exhibit Hall Open
Exhibit Hall
12:30 PM - 2:00 PM
Lunch & Exhibits
2:00 PM - 2:20 PM
Atomistic defect modeling in SiC for crystal growth optimization
Characterization I
2:00 PM - 2:20 PM
Design and Simulation of Greatly Improved Future Generation 4H-SiC JFET-R Integrated Circuits for Prolonged 500 °C Operation
High Temperature Operation & Radiation Effects
2:20 PM - 2:40 PM
Analysis of Trap Centers Generated by Hydrogen Implantation in 4H-SiC Bonded Substrates
Characterization I
2:20 PM - 2:40 PM
Device Performance and Reliability of SiC CMOS up to 400 ̊C
High Temperature Operation & Radiation Effects
2:40 PM - 3:00 PM
Analysis of Latent Gate Oxide Damage in Heavy-Ion Irradiated High-Voltage SiC Power MOSFETs
High Temperature Operation & Radiation Effects
2:40 PM - 3:00 PM
Study on conversion of survived BPDs in epitaxial layer to TEDs
Characterization I
3:00 PM - 3:20 PM
Improvement of Single Event Leakage Current Tolerance in 4H-SiC Trench MOSFET
High Temperature Operation & Radiation Effects
3:00 PM - 3:20 PM
Relationship between contrast formation in the mirror electron images and the distribution of crystal defects in polishing damage introduced on the surface of 4H-SiC wafers
Characterization I
3:20 PM - 3:40 PM
Role of Point Defects in Suppressing Stacking Fault Expansion through Helium and Proton Implantation in SiC Epitaxial Layer
Characterization I
3:20 PM - 3:40 PM
SiC in space: potential application survey
High Temperature Operation & Radiation Effects
3:40 PM - 4:00 PM
Demonstration of Structural Effects on SEB Tolerance in Trench Gate SiC-MOSFETs under Heavy-Ion Irradiation
High Temperature Operation & Radiation Effects
3:40 PM - 4:00 PM
Polarization superimposed phase contrast microscope inspection of dislocations in SiC epitaxial layer
Characterization I
4:00 PM - 4:30 PM
Break
Breaks
4:30 PM - 6:30 PM
Poster Session
7:30 AM - 6:30 PM
Registration Open
Registration
8:30 AM - 6:30 PM
Exhibit Hall Open
Exhibit Hall
8:40 AM - 9:10 AM
Deep Implanted SiC Super-Junction Technology (invited)
Superjunction & High Voltage Devices
8:40 AM - 9:10 AM
Unveiling border trap energetics in a SiO2-SiC system using capacitance based optical excitation spectroscopy (invited)
Characterization II
9:10 AM - 9:30 AM
Carbon-related interface defects in p-channel 4H-SiC MOSFETs
Characterization II
9:10 AM - 9:30 AM
Cost-Effective Design and Optimization of a 3300-V Semi Superjunction 4H-SiC MOSFET Device
Superjunction & High Voltage Devices
9:30 AM - 9:50 AM
Economic Feasibility Analysis of Vertical High-Voltage 4H-SiC Superjunction MOSFETs Compared to Conventional Counterparts
Superjunction & High Voltage Devices
9:30 AM - 9:50 AM
Signal inversion in charge pumping electrically-detected magnetic resonance of 4H-SiC MOSFETs
Characterization II
9:50 AM - 10:10 AM
Impact of transition from full- to semi-superjunction structure on the performance limit of 4H-SiC devices
Superjunction & High Voltage Devices
9:50 AM - 10:10 AM
Photoelastic measurement of residual stress in 4H-SiC substrates for evaluation of crystal growth and wafering process
Characterization II
10:10 AM - 10:30 AM
Electrical detection of Magnetic Resonance on a Chip (EDMRoC): A low-cost and sensitive characterization tool for defects in SiC MOSFETs
Characterization II
10:10 AM - 10:30 AM
High Current Pulse Power Operation of 12 kV SiC Thyristors
Superjunction & High Voltage Devices
10:30 AM - 11:00 AM
Break
Breaks
11:00 AM - 11:30 AM
Threshold voltage drift mechanism in SiC MOSFETs by photon-assisted electron injection under bipolar AC gate stress (invited)
Stress & Threshold Voltage Instabilities
11:10 AM - 11:30 AM
An approach on the void-free refill of 4H-SiC trench by CVD
Epitaxial Growth 2
11:30 AM - 11:50 AM
Controlling 4H-SiC Trench Refill Epitaxy for Superjunction Power Devices with Supersaturated Chlorinated Chemistry
Epitaxial Growth 2
11:30 AM - 11:50 AM
Insight into the mobility-limiting factors of SiC MOSFETs: the impact of gate bias stress
Stress & Threshold Voltage Instabilities
11:50 AM - 12:10 PM
Lateral epitaxial CVD growth of 4H-SiC
Epitaxial Growth 2
11:50 AM - 12:10 PM
Ultra-fast bias temperature instability and charge pumping studies of SiC trench MOSFETs with varying trench orientations
Stress & Threshold Voltage Instabilities
12:10 PM - 12:30 PM
Achieving Low Dit (~5×1010eV-1cm-2), Competitive JG (~ 5×10-10 A cm-2) Performance and Enhanced Post-Stress Flatband Voltage Stability Using Deposited Oxide
Stress & Threshold Voltage Instabilities
12:10 PM - 12:30 PM
Nearly Defect-Free Epitaxy on 150 mm C-Face SiC Substrates
Epitaxial Growth 2
12:30 PM - 2:00 PM
Lunch & Exhibits
2:00 PM - 2:20 PM
Formation of Pt ohmic contacts on p-type SiC with low contact resistivity by 600°C-annealing process
Contacts
2:10 PM - 2:40 PM
X-ray Topography Characterization of SiC Crystals aided by Ray Tracing Simulations (invited)
Extended Defects I
2:20 PM - 2:40 PM
A simplified method for extracting contact resistivity using the circular transmission line model
Contacts
2:40 PM - 3:00 PM
Evolution of the electrical and microstructural properties of Mo/4H-SiC contact with the annealing temperature
Contacts
2:40 PM - 3:00 PM
Using Convolutional Neural Network to Map Defects in SiC
Extended Defects I
3:00 PM - 3:20 PM
Advantages of backside metal contact resistance on 4H-SiC bonded substrates for power devices
Contacts
3:00 PM - 3:20 PM
Punching of Prismatic Dislocation Loops from Inclusions in 4H-SiC Wafers
Extended Defects I
3:20 PM - 3:40 PM
Abnormal carrot defect and its buried prismatic stacking fault structure in 4H-SiC epitaxial layer
Extended Defects I
3:20 PM - 3:40 PM
Indium-Tin-Oxide (ITO) Interlayer-assisted Ohmic Contacts on N-type 4H-SiC with Low Specific Contact Resistance
Contacts
3:40 PM - 4:00 PM
Formation of Ti-based ohmic contacts on n-type SiC with ρC= 6*10^{-8} Ωcm^2
Contacts
3:40 PM - 4:00 PM
New insights into the occurrence of prismatic slip during PVT growth of SiC crystals
Extended Defects I
4:00 PM - 4:30 PM
Break
Breaks
4:30 PM - 6:30 PM
Poster Session
7:30 AM - 8:00 PM
Registration Open
Registration
8:30 AM - 6:30 PM
Exhibit Hall Open
Exhibit Hall
8:40 AM - 9:10 AM
Formation mechanism of basal plane dislocations in 150 mm-diameter SiC wafers with thick epitaxial layers (invited)
Extended Defects II (Stacking Faults)
8:40 AM - 9:10 AM
Suppression of Short-Channel Effects by Self-Aligned Process for SiC UMOSFETs with Channel Length of under 0.3 μm (invited)
Novel Device Architectures
9:10 AM - 9:30 AM
Investigation of Advanced Hexagonal Layouts for 650 V SiC MOSFETs
Novel Device Architectures
9:10 AM - 9:30 AM
Investigation of BPD Faulting in Engineered vs Monocrystalline SiC Substrates Under Ultra-High Carrier Injection for Pulsed Power Application
Extended Defects II (Stacking Faults)
9:30 AM - 9:50 AM
A Novel 'Ladder' Design for Improved Channel Density for 1.2kV 4H-SiC MOSFETs
Novel Device Architectures
9:30 AM - 9:50 AM
Formation Mechanism and Complex Faulting Behavior of a BPD Loop in 180 µm Thick 4H-SiC Epitaxial layer
Extended Defects II (Stacking Faults)
9:50 AM - 10:10 AM
Dynamics of stacking fault expansion in H+ implanted SiC-MOSFETs investigated by photoluminescence spectroscopy
Extended Defects II (Stacking Faults)
9:50 AM - 10:10 AM
SiC MOSFETs C-V capacitance curves with negative biased Drain
Novel Device Architectures
10:10 AM - 10:30 AM
Demonstration of Suppressing 1SSF Expansion Using Energy Filtered Ion Implantation
Extended Defects II (Stacking Faults)
10:10 AM - 10:30 AM
On the Characterization of 4H-SiC PiN and JFETs for their USE in High-Voltage Bidirectional Power Devices
Novel Device Architectures
10:30 AM - 11:00 AM
Break
Breaks
11:00 AM - 11:30 AM
Heavy-ion irradiation effects in 4H-SiC unipolar devices (invited)
Radiation Effects & Superjunction
11:10 AM - 11:30 AM
Control over the density of single photon emitters at SiO_2/SiC interfaces: CO_2 vs. Ar annealing
Quantum Centers & Characterization
11:30 AM - 11:50 AM
Exploring intrinsic high-frequency limitations of electronic devices: The end of the road of Schottky rectification
Sensors & Novel Applications
11:30 AM - 11:50 AM
Impact of electron irradiation on SiC power MOSFET performance
Radiation Effects & Superjunction
11:50 AM - 12:10 PM
Effects of Proton Irradiation Before Device Fabrication on the Switching Characteristics of 3.3kV SiC MOSFETs
Radiation Effects & Superjunction
11:50 AM - 12:10 PM
Evolution of photoluminescence and optically detected magnetic resonance spectra of divacancy defects in 4H-SiC from cryogenic to room temperatures
Quantum Centers & Characterization
12:10 PM - 12:30 PM
Annealing 4H-SiC Trenches for Superjunction Technology
Radiation Effects & Superjunction
12:10 PM - 12:30 PM
Investigation of oxygen-related defects in 4H-SiC from ab initio calculations
Quantum Centers & Characterization
12:30 PM - 2:00 PM
Lunch & Exhibits
2:00 PM - 2:20 PM
Temperature Dependence of 1200V-10A SiC Power Diodes: Impact of Design and Substrate on Electrical Performance
Device Characterization & Defect Impacts
2:10 PM - 2:40 PM
8-inch thick SiC crystals grown by solution growth method combined with digital twin (invited)
Bulk Growth 2
2:20 PM - 2:40 PM
Exploring the Influence of Implant Profile and Device Design on Basal Plane Dislocation Generation in 1.2kV 4H-SiC Power MOSFETs
Device Characterization & Defect Impacts
2:40 PM - 3:00 PM
Numerical Simulation Study on Different Scales to Suppress Solvent Inclusion Defects in SiC Solution Crystal Growth
Bulk Growth 2
2:40 PM - 3:00 PM
Three level stress pulses to investigate gate switching instability
Device Characterization & Defect Impacts
3:00 PM - 3:20 PM
Development of a 200 mm-Diameter 4H-SiC Crystal Using the HTCVD Method Enhanced by Process Informatics
Bulk Growth 2
3:00 PM - 3:20 PM
Investigation on effect of electrical characteristics of proton implanted 4H-SiC MOSFET
Device Characterization & Defect Impacts
3:20 PM - 3:40 PM
A novel method to grow 4H-SiC single crystals with low BPD densities on multiple substrates: Grown crystals’ properties and their controlling factors
Bulk Growth 2
3:20 PM - 3:40 PM
Matching physical and electrical measurements (OBIC) to simulation (FEM) on high voltage bipolar diodes
Device Characterization & Defect Impacts
3:40 PM - 4:00 PM
ML-based Surrogate Model for Temperature Prediction and Efficient Parameter Calibration of PVT Simulations
Bulk Growth 2
3:40 PM - 4:00 PM
Using in-situ nanoprobing in the scanning electron microscope to visualize the local potential on a biased SiC p-n junction
Device Characterization & Defect Impacts
4:00 PM - 4:30 PM
Break
Breaks
4:30 PM - 6:30 PM
Poster Session
7:30 PM - 10:00 PM
Gala Dinner (Ticket needed to enter)
Gala Dinner
7:30 AM - 10:00 AM
Registration Open
Registration
8:30 AM - 8:50 AM
Fabrication of the planer SiC gate-all-around JFET with channel dose modulation
Ion Implantation
8:30 AM - 8:50 AM
Spectral Investigation of Various Stacking Faults After Epitaxial Growth of 180m Thick Layer on 4H-SiC substrates
Epitaxial Growth 3
8:50 AM - 9:10 AM
Epitaxial growth of 280 μm thick 4H-SiC on 4°-off substrates for ultra-high-power devices
Epitaxial Growth 3
8:50 AM - 9:10 AM
Suppression of stacking-fault expansion in 4H-SiC diodes by helium implantation
Ion Implantation
9:10 AM - 9:30 AM
Formation of alternating epilayers of 4H-SiC and 3C-SiC by simultaneous lateral epitaxy
Epitaxial Growth 3
9:10 AM - 9:30 AM
Simulation of High-energy Channeling Implantation in 4H-SiC
Ion Implantation
9:30 AM - 9:50 AM
Investigation of Dry Transfer of Epitaxial Graphene from SiC(0001)
Epitaxial Growth 3
9:30 AM - 9:50 AM
Thermal-oxidation and Ion-implantation-induced Strain in 4H-SiC
Ion Implantation
9:50 AM - 10:10 AM
Isolation Structure for Monolithic Integration of Planar CMOS and 1.7 kV Vertical Power MOSFET on 4H-SiC by High Energy Ion Implantation
Ion Implantation
9:50 AM - 10:10 AM
Unleashing the Potential of Low Dimensional Silicon Carbide
Epitaxial Growth 3
10:10 AM - 10:30 AM
Effect of counter-doping on threshold voltage and mobility in SiC p-channel MOSFETs
Ion Implantation
10:10 AM - 10:30 AM
New insights in Orientation and Growth of 150 mm GaN on SiC for HEMT
Epitaxial Growth 3
10:30 AM - 11:00 AM
Break
Breaks
11:00 AM - 11:30 AM
Lifetime modeling of MOS based SiC vertical power devices under high voltage blocking stress (invited)
Reliability & Robustness
11:10 AM - 11:30 AM
Analysis of Silicon Vacancy Configurations and their Identification
Point Defects
11:30 AM - 11:50 AM
Challenges of Transient Virtual Junction Temperature Measurement of SiC MOSFETs by VSD(T)-Method for Power Cycling – A Study on Impact Factors
Reliability & Robustness
11:30 AM - 11:50 AM
Characterization of the charge state of the silicon vacancy in 4H-SiC using low-energy muon spin spectroscopy
Point Defects
11:50 AM - 12:10 PM
Bipolar degradation driven by junction-temperature controlled Power Cycling Milliseconds (PCmsec) in Silicon Carbide Power Devices
Reliability & Robustness
11:50 AM - 12:10 PM
Channeling proton implantation for localized defect control in 4H-SiC: A combined SIMS/DLTS depth profiling study
Point Defects
12:10 PM - 12:30 PM
Electrically Detected Magnetic Resonance and Near-Zero Field Magnetoresistance Measurements of Deep Level Defects in GaN Schottky Diodes
Point Defects
12:10 PM - 12:30 PM
Investigation of overcurrent turn-off robustness of 1200 V SiC MOSFETs
Reliability & Robustness
12:30 PM - 1:30 PM
Lunch
Meals
1:30 PM - 2:00 PM
Monte Carlo analyses on impact ionization coefficients in 4H-SiC (invited)
Intrinsic Properties
1:40 PM - 2:00 PM
Physically Based Mobility Model for SiC MOSFETs in TCAD
MOSFET Modeling
2:00 PM - 2:20 PM
Low-field and high-field anisotropic electron transport in 4H-SiC
Intrinsic Properties
2:00 PM - 2:20 PM
TCAD Modelling of Anisotropic Channel Mobility in 4H-SiC MOSFETs
MOSFET Modeling
2:20 PM - 2:40 PM
Application of photoexcited muon spin spectroscopy to study excess charge carrier lifetimes in 4H-SiC epilayers
Intrinsic Properties
2:20 PM - 2:40 PM
Influence of Threshold Voltage Mismatch on Switching Behavior of Parallel SiC Power MOSFETs
MOSFET Modeling
2:40 PM - 3:00 PM
A Physics-Based SPICE Model for a SiC Vertical Power MOSFET
MOSFET Modeling
2:40 PM - 3:00 PM
First principles study of acceptor impurities in 4H-SiC bulk and interfaces
